The after-conference proceeding of the CML 2026 will be published in SCOPUS Indexed Springer Book Series "Lecture Notes in Networks and Systems"

Adarsh Mittal

When Great Semiconductor Ideas Meet Reality: Why Research Breakthroughs Don’t Always Become Products

Abstract:

Semiconductor research regularly produces impressive architectural ideas and measurable performance gains in controlled experimental environments. Yet many of these innovations never survive the transition from laboratory validation to real-world product deployment. The challenge is rarely the novelty of the idea itself, but the complexity of integrating it into large-scale production systems.

This keynote explores the fundamental gap between academic research environments and the realities of shipping production silicon. While laboratory evaluations often rely on controlled workloads and simplified assumptions, real systems operate within strict constraints such as verification coverage, legacy compatibility, software stacks, power and thermal limits, and multi-year product lifecycles. These factors frequently expose limitations that remain hidden during early-stage research.

Drawing from industry experience in large-scale semiconductor and computing systems, the talk highlights several recurring disconnects—including differences in testing coverage, success metrics, benchmarking practices, tooling maturity, and lifecycle expectations—that determine whether an idea can realistically move from research to production. The session will also discuss practical perspectives on designing innovations that can survive integration into complex hardware ecosystems.

Ultimately, the keynote will focus on how researchers and engineers can better align innovation with real-world system constraints so that promising ideas have a greater chance of becoming deployable technologies rather than remaining isolated research successes.

Profile:

Adarsh Mittal is a semiconductor and computer architecture engineer specializing in high-performance processor design, scalable interconnect architectures, and memory system optimization. His work focuses on the design and development of next-generation computing systems, including on-chip and off-chip interconnect networks, multi-processor coherency mechanisms, and large-scale cache and memory architectures used in modern high-performance processors.

He holds a Master’s degree in Computer Science from the University of Wisconsin–Madison, where he conducted research on improving memory subsystem performance in out-of-order processors under the guidance of Professor Gurindar Sohi. His research resulted in a publication at the IEEE/ACM International Symposium on Microarchitecture (MICRO) and contributed to ongoing patent work related to processor memory systems. Prior to that, he earned a Bachelor’s degree in Electrical and Electronics Engineering from Birla Institute of Technology and Science, Pilani, graduating among the top performers in his class.

With over a decade of experience in semiconductor engineering, Adarsh has worked across the full silicon development lifecycle, including microarchitecture definition, RTL design, verification, timing optimization, and physical implementation across advanced process technologies. His work spans processor microarchitecture, hardware–software interaction, and system-level performance optimization for complex computing platforms.

In addition to his engineering work, Adarsh contributes to the broader research and professional community through technical publications, peer review activities, and mentoring. His interests include processor architecture, high-performance computing systems, memory hierarchy design, and the practical challenges involved in translating architectural research into production-scale hardware systems.

Through his writing and speaking engagements, Adarsh focuses on bridging the gap between academic research and real-world semiconductor deployment, offering perspectives on how architectural innovation can evolve into scalable and reliable production technologies.